What you do at AMD changes everything

At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

AMD has an opening for an Intern in the SOC Design and Functional Safety organization. The team is responsible for designing components for Processor Sub-system for the Adaptable Compute Acceleration Platform (ACAP) and further ensuring its compliance to ISO26262 for usage in automotive applications.

In this internship role, you will:
- Own the design and implementation of blocks to meet functional, timing, area and safety goals
- Design and implement logic functions that enable efficient test and debug
- Participate in design reviews for features designed
- Contribute to development of ISO26262 specific safety metrics calculation engine
- Implement Automation to increase design team efficiency

Required Qualifications
- Current enrolment in a Master's degree program in Electrical Engineering or Computer Engineer
- Good understanding of fundamentals of digital logic design including Verilog / SystemVerilog skills
- Academic/project experience in
  - Designing digital logic blocks using Verilog
  - Writing timing constraints and exceptions in TCL or SDC syntax
  - Automation using scripting techniques such as PERL, Python or TCL
  - Building block level testbench and testcases
  - Synthesis, static timing analysis & optimization
- Ability to develop clear and concise engineering documentation
- Experience with industry-standard EDA tools from Xilinx, Cadence, Synopsys or Mentor
- Excellent verbal and written communication skills
- Excellent organizational skills and attention to detail

Desired Qualifications
- Understanding of ARM architecture and APB, AXI, CHI protocols
- Understanding of crypto algorithms like AES, SHA, RSA, and ECDSA
- Understanding of design for security best practices
- Understanding of design for Functional Safety best practices
- FPGA knowledge and emulation experience
- Xilinx ISE or Vivado Design Suite and other Xilinx CAD tools
- Expected Start Date: September 2022
- Duration: minimum 3 months
- Hours per week: full-time (40)
- Expected to work onsite at our San Jose Office located at 2100 Logic Dr San Jose, CA 95124

Requisition Number:179921
Country:United StatesState:CaliforniaCity:San Jose
Job Function:Student/ Intern/ Temp

Benefits offered are described here<>.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here <>for more information.