Job ID: JR0231175

Job Category: Engineering

Primary Location: Hillsboro, OR US

Other Locations:

Job Type: Experienced Hire

ODP Senior Process Integration Engineer

Job Description

Process Integration Engineers are responsible for partnering with process engineering, manufacturing, Quality and Reliability, and support teams to drive process sustaining excellence, responding to and driving resolution of process quality events, change control, and new product introduction.

As a Process Integration Engineer, you will be responsible for but not limited to:

Responding to quality events in the high-volume manufacturing process line, containing, and dispositioning suspect material, and driving corrective and preventative measures.
Partner with process engineering to drive integrated process margin improvements.
Lead task forces through the model-based problem-solving methodology to resolve process excursions.
Partner with Technology Development to develop, qualify and transfer new products and processes to HVM Develop strong partnerships with Die Prep/Sort Process Engineering, Manufacturing, Quality and Reliability teams, Product engineering, and technology development teams.

The ideal candidate should exhibit the following behavioral traits:

Data analysis, and problem-solving skills.
Organizational skills with great attention to detail.
Interpersonal skills to work across diverse workgroups.
Communication, presentation skills, and Technical leadership skills.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

The candidate must possess at least one of the following degrees plus the years of experience determined for each degree in the areas specified below

Bachelor's degree in Material Science, Chemistry, Physics, Electrical, Chemical, Mechanical Engineering, or related field with 8+years in a semiconductor field.
Master's degree in Material Science, Chemistry, Physics, Electrical, Chemical, Mechanical Engineering, or related field with 6+ years in a semiconductor field.
Ph.D. degree in Material Science, Chemistry, Physics, Electrical, Chemical, Mechanical Engineering, or related field with 4+ years in a semiconductor field.

Preferred Qualifications:

5+ years of wafer fab, die preparation, or assembly experience.
Knowledge of statistical process control techniques, and JMP/SQL data analysis tools.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.Â Employees in theÂ Technology Development and Manufacturing GroupÂ are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Mooreâ€™s Law to bring smart, connected devices to every person on Earth.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.