Job ID: JR0226564
Job Category: Intern/Student
Primary Location: Folsom, CA US
Other Locations: US, California, Santa Clara
Job Type: Intern
Job Description
In Xe Architecture IP Engineering (XAE) our mission is to deliver best in class Graphics, Compute, Multi-Media and Display IP on schedule with maniacal focus on performance per watt and performance per area with state of art features covering client, gaming and data center market. We strive to lead the industry through continuous innovation and world-class engineering. We work closely with partners across Intel and do not let any organizational boundary get in the way of solving problems.
This position is at the forefront of Intel's next generation CPU/Graphics design and you will be part of the Graphics logic design teams which are working on the latest best Intel 3D/media technology and design. We are looking for a Graduate Intern - Logic Design Engineering to join our team.
Your responsibilities will include, but not be limited to one or more of the following:
Aspects of the design flow which encompasses all aspects of logic design methodology
Responsible for Register Transfer Level RTL HDL design validation, test vector generation, and debug Test bench development
Responsible for running power analysis tools
Responsible for pre- and post-layout static timing analysis
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through relevant schoolwork, internships, jobs and/or research experience:
Minimum Skills and Experience:
Candidate must be pursuing a Master's degree in Electrical/Computer Engineering. OR a PhD in the same fields:
Candidate must have 6+ months of work or educational experience in the following areas:
Logic design OR validation/verification OR digital electronics
Verilog OR System Verilog
Microprocessors OR computer system architecture
Scripting languages Perl or Python
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Preferred Skills and Experience:
Experience with synthesis, and timing analysis tools
​Candidate must be willing to do at least a 6+ months internship.
Inside this Business Group
The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center. Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.
Other Locations
US, California, Santa Clara
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Work Model for this Role
This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.
USInternJR0226564FolsomAccelerated Computing Systems and Graphics (AXG)