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The Role:

A FPGA Platform Engineers responsibility working on innovative FPGA platforms for debug and validation solutions. In this role, you will collaborate with cross functional teams (BIOS, Board, System Architects, etc.) to design FPGA platforms with High-Speed IO. You will get the opportunity to design and bring up FPGA platforms for components in the AMD SOC.

Key Responsibilities:

Experience Required:

- FPGA Design Experience with one or more High Speed IO Protocols (PCIe, Ethernet, CXL, DDR, etc.)
- Proficiency with Verilog and/or System Verilog
- 10+ years of RTL Design experience for FPGA or ASIC
- Experience with FPGA Synthesis, Timing Closure
- Experience with FPGA Debug in Simulation and HW Bring up
- Experience with scripting languages (Python, Perl, TCL, Bash, etc.)
- Knowledge of using and debugging in a UVM environment

Preferred Experience:

- Experience working with embedded firmware and or device driver development
- Experience developing C or C++ and debugging with trace files and debuggers
- Knowledge of x86 and/or ARM of SoC Architecture
- Experience with lab equipment (protocol/logic analyzers, oscilloscopes, etc.)
- Developing System Verilog Test Content
- Experience with one or more of the following protocols: SPI, I2C, AXI, QSPI, USB, etc.
- Experience with source control systems (Perforce, Git, etc.)

Requisition Number:184348
Country:United StatesState:CaliforniaCity:Santa Clara
Job Function:Design

Benefits offered are described here<>.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here <>for more information.