Job ID: JR0232660
Job Category: Engineering
Primary Location: Hudson, MA US
Other Locations: US, California, Santa Clara
Job Type: Experienced Hire
SoC Pre-Silicon Validation Engineer
Job Description
The world is transforming – and so is Intel!
Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world.
With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver IP solutions for products that impact customers lives? If so, Come join us to do something wonderful!
In this position you will be working as part of a Pre-silicon Power Management Validation Team on current and next generation server products
Responsibilities will include although not limited to:
Compiling and executing test plans that guarantee thorough verification of features/functionality.
Writing monitors, checkers, scoreboards, stimulus, test sequences, and directed tests.
Analyzing test failures with ability to debug to root cause, then assisting in defining preferred fix.
Understanding of Register Transfer Level (RTL) code written in Verilog and System Verilog (SV).
In addition to the responsibilities listed above, the ideal candidate will also have:
System Verilog UVM validation expertise.
Experience in IP verification using Verilog or System Verilog and Open Verification Methodology (OVM) or Universal Verification Methodology (UVM).
Defining and implementing verification environments that include use of constrained-random stimulus and functional coverage.
Participating in improvements to the validation environment.
Capability as an effective team player with a continuous learning mindset.
Willingness to balance multiple tasks in an exciting, fast-paced development environment.
Willing to read and interpret technical specs to understand IP functional behavior.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Candidate must have a Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of experience in:
Experience in IP verification using Verilog or System Verilog and Open Verification Methodology (OVM) or Universal Verification Methodology (UVM).
Understanding of Register Transfer Level (RTL) code written in Verilog and System Verilog (SV).
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Inside this Business Group
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
Other Locations
US, California, Santa Clara
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
USExperienced HireJR0232660HudsonIP Engineering Group (IPG)
